FPGA Engineer
Apple
- ירושלים
- משרה קבועה
- משרה מלאה
- Proficient in Verilog RTL language.
- Experienced with large FPGA development on Altera or Xilinx devices.
- Very familiar with Altera's or Xilinx's build flow including design entry in Verilog, synthesis, place and route, timing constraints and timing closure.
- Hands on with lab FPGA debug methodologies, such as ChipScope, SignalTap or others.
- Hands on experience with lab debug equipment, such as oscilloscopes and logic analysers.
- Experience with verification methodologies, RTL and gate level simulations and debug.
- Experience debugging silicon and PCB issues.
- Excellent communication skills and demonstrate the desire to take on diverse challenges.