
Design Verification Engineer, Networking, Google Cloud
- תל אביב
- משרה קבועה
- משרה מלאה
- Bachelor's degree in Electrical Engineering or equivalent practical experience.
- 4 years of experience working with design networking like Remote Direct Memory Access (RDMA) or packet processing and system design principles for low latency, throughput, security, and reliability.
- Experience in creating and using verification components and environments in standard verification methodology.
- Experience in verifying digital systems using standard Internet Protocol (IP) components or interconnects (e.g., microprocessor cores, hierarchical memory subsystems).
- Experience in Transmission Control Protocol (TCP), IP, Ethernet, PCIE and Dynamic random-access memory (DRAM), Network on Chip (NoC) principles and protocols.
- Experience in estimating performance by analysis, modeling, and network simulation in defining and driving performance test plans.
- Experience with verification techniques, and the full verification life-cycle.
- Experience with performance verification of ASICs and ASIC components.
- Experience with ASIC standard interfaces and memory system architecture.
- Plan the verification of digital design blocks by understanding the design specification and interacting with design engineers to identify important verification scenarios.
- Create and enhance constrained-random verification environments using SystemVerilog or formally verify designs with Strategic Value Add (SVA) and industry leading formal tools.
- Identify and write all types of coverage measures for stimulus and corner-cases.
- Debug tests with design engineers to deliver functionally correct design blocks.
- Close coverage measures to identify verification holes and to show progress towards tape-out.